A Parallel Partitioning Method for Large-Scale Circuit Simulation

by Xiaodong Zhang, Univ of Colorado at Boulder, United States,

Document Type: Proceeding Paper

Part of: University Programs in Computer-Aided Engineering, Design, and Manufacturing


In this paper, we discuss a partitioning method for large-scale circuit in parallel computer simulation. The partitioning method maps the sparse and irregular circuit equations to a special class of nonlinear problems of block bordered structure, which is suitable to be solved on a parallel computer. A proof is given to show that the basic idea of the result of the block bordered structure is viewed as merely the partition of the circuit and the Kirchhoff laws. We briefly describe two Newton based parallel methods to simulate the solution of the circuit system.

Subject Headings: Computer models | Parallel computing | Nonlinear analysis | Computing in civil engineering | Mapping | Integrated systems | Computer analysis | Mathematics

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